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CY2256
PentiumTM and Cyrix 6x86 Compatible Clock Synthesizer/Driver for OPTi ViperTM Chipset
Features
* Multiple clock outputs to meet all requirements of PentiumTM or Cyrix 6x86-based motherboards using the OPTi ViperTM chipset -- Five CPU clocks (CPUCLK) @ 75 MHz, 66.66 MHz, 60.0 MHz or 50.0 MHz, pin selectable -- Seven PCI clocks (PCICLK) @ 25.0 MHz, 30.0 MHz or 33.3 MHz, pin selectable -- Two Ref. clocks @ 14.318 MHz -- Ref. 14.318 MHz Xtal oscillator input * Low CPU and PCI clock jitter < 250 ps cycle-to-cycle in synchronous PCI mode * Low skew outputs -- < 200 ps between CPU clocks -- < 200 ps between PCI clocks -- < 500 ps max. skew between CPU and PCI Clocks (in synchronous mode) * Output duty cycle 45% min. to 55% max.
s
* Available in space-saving 28-pin SOIC and SSOP packages * 3.3V or 5.0V operation * Internal pull-up resistors on select input * Bank selectable CPU clock for synchronous DRAM support
Functional Description
The CY2256 is a Clock Synthesizer/Driver chip for a Pentium or Cyrix 6x86-based PC using the OPTi Viper chipset. The CY2256 has low-skew outputs (< 200 ps between the CPU Clocks, < 200 ps between the PCI Clocks). In addition, the CY2256 CPU clock outputs have less than 250 ps cycle-to-cycle jitter. Finally, both the PCI and CPU clock outputs meet the 1V/ns slew rate requirement of the Pentium processor-based system. The CY2256 accepts a 14.318 MHz reference crystal or clock as its input. The CY2256 has two PLLs, one of which generates the CPU clocks, and the other generates the PCI clocks. The CY2256 runs off a 3.3V or 5.0V supply.
Logic Block Diagram
REF0(14.318MHz) XTALIN XTALOUT 14.318 MHz OSC. REF1(14.318MHz) PCI PLL
Pin Configuration
Top View SOIC/SSOP
VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 REF0 REF1 VDD PCICLK6 PCICLK5 VSS PCICLK4 PCICLK3 VDD PCICLK2 PCICLK1 VSS PCICLK0 CPUCLKB0 XTALIN XTALOUT
MUX
PCICLK0 PCICLK1 PCICLK2
VSS S2 CPUCLKA0 CPUCLKA1 VDD CPUCLKA2 CPUCLKA3
2
PCICLK3 PCICLK4 PCICLK5 PCICLK6
VSS S1 S0 VDD
CPU PLL
CPUCLKA0 CPUCLKA1
Note: CPUCLK = CPU Clock PCICLK = PCI Bus Clock
2256-2
ROM S0 S1 S2
CPUCLKA2 CPUCLKA3 CPUCLKB0
2256-1
Intel is a registered trademark of Intel Corporation. OPTi Viper is a trademark of OPTi Corporation. Pentium is a trademark of Intel Corporation.
Cypress Semiconductor Corporation
*
3901 North First Street
*
San Jose
* CA 95134 * 408-943-2600 October 1996 - Revised June 12, 1997
CY2256
Pin Summary
Name VDD XTALIN VSS S2 CPUCLKA0 CPUCLKA1 VDD CPUCLKA2 CPUCLKA3 VSS S1 S0 VDD CPUCLKB0 PCICLK0 VSS PCICLK1 PCICLK2 VDD PCICLK3 PCICLK4 VSS PCICLK5 PCICLK6 VDD REF1 REF0
[1]
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Description Voltage supply Reference crystal input Reference crystal feedback Ground CPU clock select input, bit 2 (internal pull-up resistor to VDD) CPU clock A output CPU clock A output Voltage supply CPU clock A output CPU clock A output Ground CPU clock select input, bit 1 (internal pull-up resistor to VDD) CPU clock select input, bit 0 (internal pull-up resistor to VDD) Voltage supply CPU clock B output PCI clock output Ground PCI clock output PCI clock output Voltage supply PCI clock output PCI clock output Ground PCI clock output PCI clock output Voltage supply Reference clock output (14.318 MHz) Reference clock output (14.318 MHz)
XTALOUT[1]
Function Table
S0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 S1 0 1 0 1 0 1 0 1 S2 XTALIN Input 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz - CPUCLKA 50.0 MHz 50.0 MHz 60.0 MHz 60.0 MHz 66.66 MHz 75.0 MHz 66.66 MHz High-Z CPUCLKB 50.0 MHz 50.0 MHz 60.0 MHz 60.0 MHz 66.66 MHz 75.0 MHz High-Z High-Z PCICLK 25.0 MHz 33.33 MHz 30.0 MHz 33.33 MHz 33.33 MHz 33.33 MHz 33.33 MHz High-Z Ref. Clock Output 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz High-Z PCI Mode Synch. Asynch. Synch. Asynch. Synch. Asynch. Synch. -
Notes: 1. For best accuracy, use a parallel-resonant crystal, CLOAD = 18 pF. 2. TCLK is a test clock on the XTALIN input during test mode.
2
CY2256
CPU and PCI Clock Driver Strengths
* Matched impedances on both rising and falling edges on
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Supply Voltage ................................................. -0.5 to +7.0V Input Voltage ..............................................-0.5V to VDD+0.5 Storage Temperature (Non-Condensing)... -65C to +150C Max. Soldering Temperature (10 sec)...................... +260C Junction Temperature .............................................. +150C Package Power Dissipation.............................................. 1W Static Discharge Voltage ........................................... >2000V (per MIL-STD-883, Method 3015)
the output drivers * Output impedance: 25 (typical) measured at 1.5V
Operating Conditions[3]
Parameter VDD TA CL Supply Voltage Operating Temperature, Ambient Max. Capacitive Load on CPUCLKA CPUCLKB PCICLK REF0 REF1 Reference Frequency, Oscillator Nominal Value 14.318 Description Min. 3.135 0 Max. 3.6 70 30 30 30 15 30 14.318 MHz Unit V C pF
f(REF)
Electrical Characteristics VDD = 3.135V to 3.6V, TA = 0C to +70C
Parameter VIH VIL VOH Description High-level Input Voltage Low-level Input Voltage High-level Output Voltage Test Conditions Except Crystal Inputs Except Crystal Inputs VDD = V DD Min. IOH = -23 mA IOH = -23 mA IOH = -12 mA IOH = -16 mA VOL Low-level Output Voltage VDD = V DD Min. IOL = 16 mA IOL = 16 mA IOL = 8 mA IOL = 11 mA IIH IIL IOZ IDD Input High Current Input Low Current Output Leakage Current VIH = VDD VIL = 0V Three-state = 0 or VDD -10 CPUCLKA/B PCICLK REF0 REF1 CPUCLKA/B PCICLK REF0 REF1 5 100 +10 90 A A A mA 0.4 V 2.4 Min. 2.0 0.8 Max. Unit V V V
Power Supply Current VDD = 3.6V, VIN Note: 3. Electrical parameters are guaranteed with these operating conditions.
3
CY2256
]
Switching Characteristics[4]
Parameter t1 t1C t1C t1D t1D t2 t3 t4 t2 t2 t5 t6 t7 t8 t9 t10 All CPUCLKA/B PCICLK CPUCLKA/B PCICLK CPUCLKA/B CPUCLKA/B CPUCLKA/B PCICLK REFCLK CPUCLKA PCICLK CPUCLKA/B, PCICLK CPUCLKA/B CPUCLKA/B PCICLK Output Description Output Duty Cycle[5] CPU Clock HIGH Time PCI Clock HIGH Time PCI Clock LOW Time
[6]
Test Conditions t1 = t1A / t1B Measured at 2.4V Measured at 2.4V Measured at 0.4V Measured at 0.4V
Min. 45% 5.0 12.0 5.0 12.0 1 0.5 0.5 1 0.5
Max. 55%
Unit ns ns ns ns
CPU Clock LOW Time
[6]
CPU Clock Rising and Fall- Measured between 0.4V and 2.4V ing Edge Rate CPU Clock Rise Time CPU Clock Fall Time PCI Clock Rising and Falling Edge Rate Reference Clock Rising and Falling Edge Rate CPU-CPU Clock Skew PCI-PCI Clock Skew CPU-PCI Clock Skew[7] Cycle-Cycle Clock Jitter[7] Power-up Time Power-up Time Measured between 0.4V and 2.4V Measured between 2.4V and 0.4V Measured between 0.4V and 2.4V Measured between 0.4V and 2.4V Measured at 1.5V Measured at 1.5V Measured at 1.5V CPU Clock jitter CPU clock stabilization from power-up PCI clock stabilization from power-up
4.0 2.0 2.0 4
V/ns ns ns V/ns V/ns
200 200 500 250 3 3
ps ps ps ps ms ms
Notes: 4. All parameters specified with outputs fully loaded. 5. Duty cycle is measured at 1.5V. 6. A LOW and HIGH time of 12 ns corresponds to a PCICLK frequency of 33.33 MHz. For PCICLK frequencies of 30 MHz and 25 MHz, the LOW and HIGH times are each respectively 13.33 ns and 16 ns. 7. Synchronous mode only
Switching Waveforms
Duty Cycle Timing
t1B t1A 1.5V 1.5V 1.5V
2256-3
4
CY2256
Switching Waveforms (continued)
All Outputs Rise/Fall Time
t1C OUTPUT 2.4V 0.4V t2 t3 2.4V 0.4V t2 t4 t1D 3.3V 0.4V 0V
2256-4
Clock Skew
1.5V
CPUCLK or PCICLK t5 t6
1.5V
2256-5
CPU-PCI Clock Skew
CPUCLK 1.5V
PCICLK t7
1.5V
2256-6
5
CY2256
Test Circuit
VDD
1 0.1 F 4 VDD 0.1 F
26 0.1 F 23
8
20 0.1 F
11
17
14 0.1 F
OUTPUTS CLOAD
Note: All capacitors should be placed as close to each pin as possible.
Ordering Information
Ordering Code CY2256SC-1 CY2256PVC-1 Document #: 38-00515-A Package Name S21 O28 Package Type 28-Pin SOIC 28-Pin SSOP Operating Range Commercial Commercial
6
CY2256
Package Diagrams
28-Lead (300-Mil) Molded SOIC S21
28-Lead Shrunk Small Outline Package O28
(c) Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

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